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GAIO Processor Core

FPGA-based processor core IP for compact-sized embedded system designs
Includes a 16 bit microprocessor core for low cost FPGA implementation
Comes complete with GAIO’s development tools

‘GAIO Processor Core’ is an original FPGA-based 16 bit RISC microprocessor core for SoC. It is designed for compact, low cost FPGA’s, and comes equipped with a 16 bit microprocessor, as well as GAIO’s own development tools. The development tools include a C compiler and an assembler useful for HW/SW development.

GAIO’s Original Microprocessor Core

‘GAIO Processor Core’ is an original FPGA-based 16 bit RISC microprocessor core SoC. Using the FPGA, user developed circuit designs may be implemented in a short time and at a low cost.

Works with a Variety of FPGA Devices

Many microprocessor cores are designed for a specific manufacturer’s device, and cannot be implemented with an FPGA from a different manufacturer. Further, with some core designs it may not be possible for mass production ASIC implementation.

GAIO Processor Core is not dependant upon a specific FPGA device, thus it may be used with the FPGA device best suited for the product design.
This feature is also particularly beneficial for extending the life of the product. For example, if over time the FPGA device used in the original design is no longer easily obtainable, a different FPGA may be implemented thereby preserving the product.

Comparison with Other Microprocessor Cores

Because GAIO Processor Core has a 16 bit RISC architecture, the code implementation efficiency is very high and may be implemented with compact, low cost FPGA’s. Development tools are also included such as an assembler and a C compiler scheduled for release in Dec. 2009.

Development Tools

GAIO’s ‘XASS-V Series’ development tools are included with the GAIO Processor Core. This package includes a cross compiler and assembler for a variety of popular embedded microprocessors.

Cost Reduction Case Example

A professional equipment developer was using a 32 bit microprocessor core and FPGA combination at a cost and capability higher than necessary.
Using the GAIO Processor Core and a lower cost FPGA, the developer was able to implement the design with nearly the same circuit size at a noticeably reduced cost.

GAIO Processor Core Evaluation Kit : FPGA-XSP3

A GAIO Processor Core evaluation kit is available for entry level designers to learn the fundamentals of CPU control and logic circuit design.
The kit comes equipped with the FPGA-XSP3 daughter board and a DC motor board (mother board) that includes a DC motor, sensors, switches and LED lamps for experimenting with I/O control and UART serial communication.
Please refer below for a block diagram and photo of the evaluation kit.